A Survey of Various Metaheuristic Algorithms Used to Solve VLSI Floorplanning Problem
نویسندگان
چکیده
---------------------------------------------------------------------***--------------------------------------------------------------------Abstract Floorplanning is an important problem in very large scale integrated-circuit (VLSI) design automation as it determines the performance, size, yield, and reliability of VLSI chips. From the computational point of view, VLSI floorplanning is an NP-hard problem. Modern very large scale integration technology is based on fixed-outline floorplan constraints, generally with an objective of minimizing area and wirelength between the modules. This survey paper gives an up-to-date account on various metaheuristic algorithms used to solve VLSI floorplanning problem.
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